/*
 * Copyright : (C) 2024 Termony Technology, Inc. All Rights Reserved.
 */

#ifndef RK_EMMC_IOC_HW_H
#define RK_EMMC_IOC_HW_H

#ifdef __cplusplus
extern "C"
{
#endif

/** @name Register Map
 *
 * Register offsets for the EMMC_IOC.
 */
#define RK_EMMC_IOC_GPIO2A_DS_L_OFFSET  0x0040U /* GPIO2A Driver Strength Control Low bits */
#define RK_EMMC_IOC_GPIO2D_DS_L_OFFSET  0x0058U /* GPIO2D Driver Strength Control Low bits */
#define RK_EMMC_IOC_GPIO2D_DS_H_OFFSET  0x005CU /* GPIO2D Driver Strength Control high bits */
#define RK_EMMC_IOC_GPIO2A_P_OFFSET     0x0120U /* GPIO2A Pull-up/down Control */
#define RK_EMMC_IOC_GPIO2D_P_OFFSET     0x012CU /* GPIO2D Pull-up/down Control */
#define RK_EMMC_IOC_GPIO2A_IE_OFFSET    0x0190U /* GPIO2A Input Enable Control */
#define RK_EMMC_IOC_GPIO2D_IE_OFFSET    0x019CU /* GPIO2B Input Enable Control */
#define RK_EMMC_IOC_GPIO2A_SMT_OFFSET   0x0220U /* GPIO2A Schmitt Trigger Control */
#define RK_EMMC_IOC_GPIO2D_SMT_OFFSET   0x022CU /* GPIO2B Schmitt Trigger Control */
#define RK_EMMC_IOC_GPIO_PDIS_OFFSET    0x0290U /* Auto Pull-up/down disable Control */

#ifdef __cplusplus
}
#endif

#endif /* RK_EMMC_IOC_HW_H */